毕业论文_Bi-CMOS集成运算放大器的电路分析及版图设计.doc

PAGE 1 PAGE IV PAGE I 毕业论文题目: Bi-CMOS集成运算放大器的电路分析及版图设计 摘 要 集成运算放大器是一种重要电子元器件，在电子产品中得到广泛应用,可作为误差放大器、比较器、滤波器等。理想的放大器应该无噪声、具有无穷大增益和输入阻抗、无穷小输出阻抗以及零失调电压等。 在这篇论文中，我本文主要研究了运算放大器电路的工作原理和版图设计，同时还了简要解了Bi-CMOS工艺步骤。运算放大器电路主要包括输入级、偏置电路、中间级和输出级，输入信号加载到输入级并在合适的偏置下通过输出级得到放大信号。版图设计主要是熟悉设计规则，布局布线合理美观，并要进行DRC验证和LVS验证。Bi-CMOS工艺可满足现代大规模集成电路对器件性能的要求，特别适用于高压和大电流的功率电路，在今后的高性能集成电路中有很大的发展潜力。 通过本次毕业设计，我完成了一个增益为86dB,输出共模范围为3.5V，失调电压为6.5mV，摆率较小的放大器电路设计。绘制出了放大器的版图，并且通过了进行DRC验证和LVS验证。 关键词：放大器,电路,版图,工艺 Subject: Analysis and layout design of CMOS integrated OP Abstract Integrated operational amplifier is an important electronic components, it is used in electronic applications is very extensive currently, for example, it can be used as amplifiers, comparators, filters, etc. The ideal amplifier should without noise, has infinite gain and input impedance, infinite output impedance and zero offset voltage. In this paper, I mainly study the works of the op amp circuit principle and layout design, and also study briefly the solution of the Bi-CMOS process steps. The op amp circuit including the input stage, bias circuit, the middle stage and output stage. The input signal is loaded into the input stage and output stage amplifies the signal in the right bias. Layout design main is familiar with the design rules, the layout wiring reasonable and beautiful, and must carry on the DRC validation and LVS verification. Bi-CMOS technology to meet the requirements of modern LVSI device performance, especially suitable for high voltage and high current power circuit, there is great potential in future high performance integrated circuits. By the graduation project, I completed a gain of 86dB; the output common-mode range is 3.5V, the offset voltage of 6.5mV, smaller slew rate amplifier circuit design. Map out the territory of the amplifier, and through the DRC verification and LVS verification. Keywords: Amplifier, Circuit, Layout, Process 目 录 TOC \o 1-3 \h \z \u 第一章 绪论 1 1.1 集成运算放大器研究的目的和意义 1 1.2