高电源抑制比的CMOS带隙基准电压源.PDFVIP

第 37 卷 第 3 期 电 子 科 技 大 学 学 报 Vol.37 No.3 2008年5月 Journal of University of Electronic Science and Technology of China May. 2008 高电源抑制比的CMOS带隙基准电压源 吴志明，黄 颖，吕 坚，王 靓，李 素 ( 电子科技大学光电信息学院 成都 610054) 【摘要】介绍了一种采用0.5 µm CMOS N阱工艺制作的带隙基准电压源电路，该电路具有高电源抑制比和较低的温度系 数。通过将电源电压加到运算放大器上，运算放大器的输出电压为整个核心电路提供偏置电压，整个核心电路的偏置电压独 立于电源电压，使得整个带隙基准电路具有非常高的电源抑制比。基于SPECTRE的仿真结果表明，其电源抑制比可达116 dB， 在－40 ℃～85℃温度范围内温度系数为46 ppm/ ℃，功耗仅为1.45 mW，可以广泛应用于模/数转换器、数/模转换器、偏置电 路等集成电路模块中。 关 键 词 带隙基准电压源；互补型金属氧化物半导体； 电源抑制比; 温度系数 中图分类号 TN432 文献标识码 A High PSRR COMS Bandgap Voltage Reference WU Zhi-ming, HUANG Ying, LÜ Jian, WANG Liang, and LI Su (School of Optoelectronic Information, University of Electronic Science and Technology of China Chengdu 610054) Abstract A bandgap voltage reference circuit using 0.5 µm complementary metal oxide semiconductor transistor (CMOS) N-well process is presented in the paper. The circuit has high power supply rejection ratio (PSRR) and low-temperature coefficient. The bias voltages of core circuit is independent to the power supply voltage, and the whole bandgap circuit has high PSRR through adding the power supply to the operational amplifier of which the output voltage is supplied for the core circuit. The simulation results for this circuit using SPECTRE show that the PSRR is 116 dB，the temperature coefficient from −40 ℃ to 85 ℃ temperature range is 46 ppm/ ℃ and the power consumption is only 1.45 mW. The bandgap discussed in this paper can be widely used in ADC, DAC, reference circuit and so on. Key words bandgap voltage reference; complementary metal oxide semiconductor transistor; power suppl