英语,I2C总线规范2.1部分.docVIP

THE I2C-BUS SPECIFICATION VERSION 2.1 JANUARY 2000 11 EXTENSIONS TO THE STANDARD-MODE I2C-BUS SPECIFICATION The Standard-mode I2C-bus specification, with its data transfer rate of up to 100 kbit/s and 7-bit addressing, has been in existence since the beginning of the 1980’s. This concept rapidly grew in popularity and is today accepted worldwide as a de facto standard with several hundred different compatible ICs on offer from Philips Semiconductors and other suppliers. To meet the demands for higher speeds, as well as make available more slave address for the growing number of new devices, the Standard-mode I2C-bus specification was upgraded over the years and today is available with the following extensions: ??Fast-mode, with a bit rate up to 400 kbit/s. ??High-speed mode (Hs-mode), with a bit rate up to 3.4 Mbit/s. ??10-bit addressing, which allows the use of up to 1024 additional slave addresses. There are two main reasons for extending the regular I2C-bus specification: ??Many of today’s applications need to transfer large amounts of serial data and require bit rates far in excess of 100 kbit/s (Standard-mode), or even 400 kbit/s (Fast-mode). As a result of continuing improvements in semiconductor technologies, I2C-bus devices are now available with bit rates of up to 3.4 Mbit/s (Hs-mode) without any noticeable increases in the manufacturing cost of the interface circuitry. ??As most of the 112 addresses available with the 7-bit addressing scheme were soon allocated, it became apparent that more address combinations were required to prevent problems with the allocation of slave addresses for new devices. This problem was resolved with the new 10-bit addressing scheme, which allowed about a tenfold increase in available addresses. New slave devices with a Fast- or Hs-mode I2C-bus interface can have a 7- or a 10-bit slave address. If possible, a 7-bit address is preferred as it is the cheapest hardware solution and results in the shortest message length. Devices