一种低功耗全MOS基准电压源的设计.docx

一种低功耗全MOS基准电压源的设计 摘 要 随着电子产品的更新和互联网的发展，集成电路的功耗逐渐成为制约电子产品小型化和长续航的瓶颈问题。为了适应集成电路低功耗的趋势，越来越多基准电压源的研究和设计进入了纳瓦水平。但是，传统的基准电压源电路中，电阻往往是不可缺少的，低成本的要求使得集成电路的数字化程度逐渐加深，因此研究设计结构简单，占用面积小，可使用标准数字 CMOS 技术实现的低功耗基准电压源具有重要的意义。 本文设计的低功耗基准电压源基于MOSFET亚阈值区的特性，MOSFET阈值电压作为重点分析和考虑的因素。从物理结构分析了亚阈值区MOSFET的原理及特点，讨论了影响MOS管阈值电压大小的因素，分析了亚阈值管的部分电流电压特性。文中详细的对基准电压源整体电路结构及其工作原理作了简单介绍，并给出了各个主要子模块电路的设计。 本设计基于SMIC 0.18um CMOS工艺，首先设计了一种全MOSFET结构的低功耗基准电压源，性能基本达到指标要求，利用Cadence Spectre完成电路仿真并完成版图设计。本文设计的低功耗基准电压源的优势以及创新之处在于：实现了低的电路功耗，在1.8V电源电压下，输出电压为470mV时，电路的总功耗约为111nW，电源抑制比达到-30db以上，温度系数为92.8ppm/℃，最终设计达到了预期的设计目标。版图设计部分对每一个模块都进行了优化，整体采用三层金属线连接，减少了对工艺的需求。利用Calibre软件完成了电路DRC验证与LVS验证，最终完成可流片的版图，总面积为210um*140um，实现了无电阻，无双极型晶体管的全MOS结构，占用面积小，与数字CMOS工艺兼容，节省生产制造成本。 关键词：低功耗，全MOS结构，基准电压源 Design of Low Power Consumption All MOS Reference Voltage Source Abstract With the updating of electronic products and the progress of the Internet, the power consumption of integrated circuits has gradually become a bottleneck restricting the miniaturization and long-term sustainability of electronic products. In order to adapt to the trend of ultra-low power consumption of integrated circuits, more and more research and design of reference voltage sources have entered the Nava level. However, in the traditional voltage reference circuit, resistance is often indispensable. The requirement of low cost makes the digitization of integrated circuits deepen gradually. Therefore, the research and design of ultra-low power reference voltage source with simple structure and small occupancy area can be realized by using standard digital CMOS technology. The ultra-low power reference voltage source designed in this paper is based on the characteristics of the sub-threshold region of MOSFET. The threshold voltage of MOSFET is the key factor for analysis and consideration. The principle and characteristics of the sub-threshold MOSFET are analyzed from the physical structure. The factors affecting the threshold voltage of the MOSFET are dis