VGA显示图片EDA原理及应用.pdf

`timescale 1ns / 1ps /////////////////////////////////////////////////////////////////// /////////////// // Company: // Engineer: // // Create Date: 2016/03/28 22:19:17 // Design Name: // Module Name: vga // Project Name: // Target Devices: // Tool Versions: // Description: // // Dependencies: // // Revision: // Revision 0.01 - File Created // Additional Comments: // /////////////////////////////////////////////////////////////////// /////////////// (* use_dsp48 = yes *) module vga( input clk, input clk1, input rst, output reg hs, output reg vs, output reg [3:0] r, output reg[3:0] g, output reg[3:0] b ); //maximum value for the horizontal pixel counter parameter HMAX=10b1100100000; // 800 //maximum value for the vertical pixel counter parameter VMAX=10b1000001101; // 525 //total number of visible columns parameter HLINES=10b1010000000; // 640 // value for the horizontal counter where front porch ends parameter HFP=10b1010010000; // 648 //value for the horizontal counter where the synch pulse ends parameter HSP=10b1011110000; // 744 //total number of visible lines parameter VLINES=10b0111100000; // 480 // value for the vertical counter where the front porch ends parameter VFP=10b0111101010; // 482 //value for the vertical counter where the synch pulse ends parameter VSP=10b0111101100; //484 //polarity of the horizontal and vertical synch pulse // only one polarity used, because for this resolution they coincide. parameter SPP=1b0; parameter pix_width=240; parameter pix_hight=320; // horizontal and vertical counters reg [9:0] hcounter=10b0000000000; reg [9:0] vcounter=10b0000000000; // active when inside visible screen area. wire video_enable ; reg vidon; wire [9:0] x_center; (*rom_style=block*) reg [11:0] pix_memory [0:pix_width*pix_hight-1]; initial begin $readmemh(pic240x320.txt, pix_memory); end vga_center Inst_vga_center(.