根据fpgaddc(数字下变频)设计与实现.pdfVIP

微系统设计、测试与控制 课程大作业之 基于 FPGA 的DDC （数字下变频）的 设计与仿真 1 2 摘 要 数字下变频(Digital Down Convert—DDC)是将中频信号下变频至零频，且使 信号速率降至适宜通用DSP器件处理速率的技术。实现这种功能的数字下变频器 是软件无线电的核心部分。 本文首先对软件无线电数字下变频的国内外现状进行了分析，然后对于 FPGA实现数字下变频设计的优势作了阐述。基于本论文在FPGA 中实现的结构， 结合软件无线电理论基础讨论了DDC 的工作原理，给出数字下变频器的常用结 构，然后设定整体系统方案，并按功能完成模块划分和接口定义，主要分为混频 器、FIR低通滤波器及抽取。通过使用Verilog和调用部分IP核相结合的方法完成 多通道DDC各个模块的设计与仿真调试，通过Matlab对各模块进行验证，结果表 明设计的思想和结构是正确的。 基于FPGA实现的DDC ，能充分体现软件无线电系统高的灵活性和宽的适应 性，本文所设计的数字下变频系统有一定的通用性。 关键字：软件无线电，数字下变频，FIR 滤波器， FPGA 1 ABSTRACT Digital Down Convert(DDC) converts digitized IF data into filtered based and data which call be processed by a standard DSP microprocessor ．DDC is a core part of a Software Radio system ． In this paper, the DDC’S current technology at home and abroad was analyzed, and then the advantages of using FPGA to complete the design of DDC were described ．This paper is based on the structure implemented in FPGA, combined with the software radio theoretical to discuss the DDC’s works, and then gives the structure of common digital down converter, and then set the whole system solutions, and then complete the module division and functional interface definition, mainly divided into mixer, FIR low-pass filter and decimation. By using Verilog and part of IP core to complete the design and simulation of multi-channel DDC commissioning of each module, validated by MATLAB for each module, the results indicate that the design and structure of thinking is correct. The DDC based on the FPGA