2020存储管理功能.ppt

Two-Level Paging Example A logical address (on 32-bit machine with 4K page size) is divided into: a page number consisting of 20 bits. a page offset consisting of 12 bits. Since the page table is paged, the page number is further divided into: a 10-bit page number. a 10-bit page offset. Thus, a logical address is as follows: where p i is an index into the outer page table, and p j is the displacement within the page table. page number page offset p i p j d 10 10 12 Address-Translation Scheme Address-translation scheme for a two-level 32-bit paging ar