FPGA可编程逻辑器件芯片XC2S150-6CS144I中文规格书.docVIP

编号： 时间：2021年x月x日 学海无涯 页码：第 PAGE 3页 共 NUMPAGES 13页 第 第 PAGE 1 页 共 NUMPAGES 1 页 FPGA可编程逻辑器件芯片XC2S150-6CS144I中文规格书 RocketIO GTX Transceiver User Guide UG198 (v3.0) October 30, 2009Chapter 7:GTX Receiver (RX) PRBS Detection Overview The GTX receiver includes a built-in PRBS checker. This checker can be set to check for one of three industry-standard PRBS patterns. The checker is self-synchronizing and works on the incoming data before comma alignment or decoding. This function can be used to test the signal integrity of the channel. Ports and Attributes Table 7-25 defines the PRBS detection ports. Table 7-26 defines the PRBS detection attributes. Description To use the built-in PRBS checker, RXENPRBSTST is set to match the PRBS pattern being sent to the receiver. The RXENPRBSTST entry in Table 7-25 shows the available settings.When the PRBS checker is running, it attempts to find the selected PRBS pattern in the incoming data. When it finds the pattern, it can detect PRBS errors by comparing the incoming pattern with the expected pattern. The checker counts the number of errors it sees and compares it with PRBS_ERR_THRESHOLD. When the error count exceeds the threshold, RXPRBSERR is asserted. Asserting PRBSCNTRESET clears RXPRBSERR. GTXRESET, RXCDRRESET, and RXRESET also reset the count. Table 7-25: PRBS Detection Ports Port Dir Clock Domain Description INTDATAWIDTH In Async Specifies the width of the internal datapath for the entire GTX_DUAL tile.PRBSCNTRESET0 PRBSCNTRESET1In RXUSRCLK2Resets the PRBS error counter. PRBSCNTRESET is applied synchronously. RXENPRBSTST0[1:0]RXENPRBSTST1[1:0]In RXUSRCLK2Receiver test pattern checker control: 00: Disable PRBS checkers 01: Enable 27-1 PRBS checker 10: Enable 223-1 PRBS checker 11: Enable 231-1 PRBS checker RXPRBSERR0RXPRBSERR1Out RXUSRCLK2RXPRBSERR goes High when the number of errors in PRBS testing exceeds the value set by the PRBS_ERR_THRESHOLD attribute. Table 7-26:PRBS