杭州矽力杰笔试.docxVIP

Analog Design Device Knowledge 1. p+/n- junction and p-/n+ junction, which has a higher breakdown voltage? Why? For a p+/n- junction having N A and N , what is the approximate function of junction D capacitance (C j ) vs. reverse biased voltage (V R)? 2. Draw the cross-section of a CMOS inverter. Draw the parasitic structure on the cross- section. Describe ways to prevent “latch - up”? Circuit Analysis See the figure below. Draw the bode plot for this circuit. Estimate the systematic offset in this amplifier. Which is the positive input? V CC RO2 C OUT V IN + W/L - M 0 RO1 See the figure below. What is this circuit? Which input is the positive input? c. How much current flows in P 2? d. If I=10uA, what is a good selection for the value of R? e. What is the Common Mode Input Range for this circuit? f. What is the Common Mode Output Range for this circuit? g. Assume the only capacitance is from OUT to GND. Draw a Bode Plot. h. Assume no load. What is the maximum positive slew rate if C OUT=C? What is the maximum negative slew rate? V CC I P2 P3 I OUT P0 P1 N 0 N 1 N 2 10/1 10/1 10/1 M=2 R R R GND 5. See the figure below. Assumeat time=0 inductor current is 0A. Draw inductor current, VX and VOUT vs. time. IL VX VOUT I 1uH 1A I 1Ω 1uS 2uS t 6. See the figure below. a. What is this circuit? /R ? b. What is the desired ratio R 2 1 c. How many stable points does this circuit have? d. Assume R 1 and R 2 have no Temperature Coefficient. Draw a graph of I in R 2 vs. Temperature. e. What is the minimum supply voltage necessary for this circuit to work properly? V CC 10/1 10/1 P0 P1 V OUT Q0 Q1 8:1 R1 R2 See the figure below. a. Write the gain equation of each circuit. b. Assuming V O=0 at time 0. Sketch V O(t) for the given input signal. R A R + - C Vin B R + - t C R R + C - 8. Draw Buck Converter Circuit and key waveform, explain the basic operations at steady state. Other Must Answer (Question 1-3) Question 1: Write the V/I relationship equations for resistor (R