《EDA与数字系统设计》课程教学大纲.docxVIP

《EDA与数字系统设计》教学大纲 一、课程基本信息 课程名称 EDA与数字系统设计 EDA and Digital System Design 课程编码 OSI324211030 开课院部 海洋与空间信息学院 课程团队 （未设置） 学分 3.0 课内学时 48 讲授 48 实验 0 上机 0 实践 0 课外学时 48 适用专业 电气信息类本研一体班 授课语言 中文 先修课程 数字电子技术 课程简介 （必修） 《EDA与数字系统设计》是信息与通信工程学术型硕士和电子信息专业型硕士培养过程中重要的专业课程。 主要教学内容包括：学习并掌握Verilog硬件描述语言，能够基于Verilog设计数字系统。掌握运用Modelsim软件进行数字系统设计和前仿真能力。掌握运用Vivado软件进行基于Xilinx FPGA进行数字系统设计和后仿真能力，熟练使用IP核的配置。掌握运用Vivado HLS进行c语言数字系统描述和设计的流程。掌握运用System Generator进行数字系统Matlab Simulink模块设计并进行FPGA嵌入并实现的能力。 经过本课程的学习，学生讲基本掌握运用Verilog语言设计基本数字系统的能力，并具备运用Modelsim和Vivado等EDA软件进行仿真的技能，同时积累在FPGA实现数字系统经验，为后续进行数字系统设计和芯片设计与实现奠定之时和能力基础。 EDA and digital system design is an important professional course in the training process of academic Master of Information and communication engineering and professional master of electronic information. The main teaching contents include: learning and mastering Verilog hardware description language, and being able to design digital systems based on Verilog. Master the ability to use Modelsim software for digital system design and pre-simulation. Master the ability of using Vivado software to carry out digital system design and post-simulation based on Xilinx FPGA, and skillfully use the configuration of IP core. Master the process of using Vivado HLS to describe and design C language digital system. Master the ability of using System Generator to design digital System Matlab Simulink module and embed and implement FPGA. Through the study of this course, the students basically master the ability of using Verilog language to Design basic digital systems, and have the skills of using EDA software such as Modelsim and Vivado to simulate, at the same time, it has accumulated the experience of implementing digital system in FPGA, which lays the foundation of time and capability for the subsequent digital system design and chip design and implementation. 负责人 大纲执笔人 审核人 二、课程目标 序号 代号 课程目标 OBE 毕业要求指标点 任务 自选 1 M1 目标1：能理解故障诊断、无损检测、安全监测领域的基本概念 是 2 M2 目标2：能理解时域、频域信号处理与分析方法 是 3 M3 目标3：能记忆并理解常见