高等计算机体系结构课件第九章（英文版）.pptxVIP

Computer Architecture: A Constructive ApproachBranch Prediction (2)1 NomenclatureDrop an instruction: What we really mean is poison the instruction so that the subsequent stages know not to update any architectural state. The poisoned instruction has to be passed down for book keeping reasons, i.e., to remove it from the scoreboard. Detecting a misprediction versus training/updating a predictor. On a pc misprediction, information about redirecting the pc has to be passed to the fetch stage. However for training the BTB and other predictors information has to be passed even when there is no misprediction.L15-2 Overview of control predictionNeed next PC immediatelyInstr type, PC relative targets availableSimple conditions, register targets availableComplex conditions availableNext AddrPredtightloopPCDecodeRegReadExecuteWriteBackGiven (pc, ppc), a misprediction can be corrected (used to redirect the pc) as soon as it is detected. In fact, pc can be redirected as soon as we have a “better” prediction. However, for forward progress it is important that a correct pc should never be redirected. mispred insts must be filtered correct mispredcorrect mispredcorrect mispredL15-3 Multiple PredictorsSuppose we maintain a table of how a particular Br has resolved before. At the decode stage we can consult this table to check if the incoming (pc, ppc) pair matches our prediction. If not redirect the pcNeed next PC immediatelyInstr type, PC relative targets availableSimple conditions, register targets availableComplex conditions availableNext AddrPredtightloopPCDecodeRegReadExecuteWriteBackmispred insts must be filtered Br Dir Predcorrect mispredcorrect mispredL15-4 PlanStudy several branch prediction schemesShow how multiple corrections to the pc are made in the pipelineShow how Branch-Direction Predictors are updated in the pipelineL15-5 Next Address Predictor (NAP)first attemptBP bits are stored with the predicted target address. IF stage: nPC = If (BP=taken)