基于RTL验证的一种SoC系统性能检查创新方法.pdfVIP

研究与设计 Research and Design 基于RTL验证的一种SoC系统性能检查创新 方法 江有财 （英特尔亚太研发中心，上海 200241） 摘要：分析表明，在芯片设计中，不断增加的设计复杂性使得项目按时交付变得越来越困难，对芯片验 证提出越来越高的要求，如果发现RTL漏洞太晚，或者修改这个漏洞的成本太高，会导致项目延误或芯片 功能缺失。特别是SoC系统性能验证，需要花费更多的时间和精力。阐述基于一款集成了ARM和DSP核 等IP的多媒体处理SoC芯片，对比了两种传统的系统性能检查方法：手动波形检查和使用VCS性能分析仪 检查。但这两种方法都是手动检查，耗时和浪费宝贵的仿真资源，且不能自动生成数据分析报告。因此 本文提出了一种创新的方法，构建了一套全新的系统性能检查环境，通过在AMBA/OCP NOC的每个端口 上连接VIP，监测端口的数据传输并记录输出到性能分析板中，并使用脚本自动计算出系统性能数值。通 过这种创新方法，能显著的加快SoC验证中的系统性能验证，并可以进行系统性能回归验证，在实际项 目中取得了很好效果，且这种方法可以很容易地移植到其他SoC项目中。 关键词：集成电路设计，SoC，RTL验证，NOC，VIP。 中图分类号：TN402 文章编号：1674-2583(2022)03-0004-04 DOI：10.19339/j.issn.1674-2583.2022.03.002 文献引用格式：江有财.基于RTL验证的一种SoC系统性能检查创新方法[J].集成电路应用,2022, 39(03): 4-7. An Innovative Method of SoC System Performance Inspection Based on RTL Verification JIANG Youcai ( Intel Asia Pacific RD Center, Shanghai 200241, China. ) Abstract — The analysis shows that in chip design, the increasing design complexity makes it more and more difficult for the project to deliver on time, and puts forward higher and higher requirements for chip verification. If the RTL vulnerability is found too late or the cost of modifying this vulnerability is too high, it will lead to project delay or chip function loss. In particular, SoC system performance verification needs to spend more time and energy. Based on a multimedia processing SoC chip integrating IP such as arm and DSP core, this paper compares two traditional system performance inspection methods: manual waveform inspection and VCs performance analyzer inspection. However, both methods are manual inspection, which is time-consuming and wastes valuable simulation resources, and can not automatically generate data analysis reports. Therefore, this paper proposes an innovative method and constructs a new system performance inspection environment. By connecting VIP on each port of AMBA / OCP NOC, the data transmission of the port is monitored and recorded and output to the performance