pcb支持组尺寸格式及信息spm sc9832a v double 6l.pptx

HW_PCBSupportGroupSizeformatandSizeinformation.1

SPM_SP9832A_V1.1.0_EMCP_0201_TOP_Double_6L_28.15*27.50SPRDPCBModulePlatformNameVersionExternalMemoryPCBDecalBBchipPositionTOPAllComponentsPlacementPCBLayersMeasure(mm)

SpreadtrumConfidentialMeasure

PISISimulationReportHW_RFASSpreadtrumConfidential

Contents .52024/8/18BasicInformationPI(PowerIntegrity)Simulation(1)SimulationSetup(2)PIResult3.SI(SignalIntegrity)Simulation(1)SimulationSetup(2)SICrosstalkResult4.Summary

PlatformProjectNameReportdateSC9830A+LPDDR3SPM_SC9830A_V1.1.0_EMCP_0201_TOP_Double_6L_28.15X27.502016.02.25BasicInformation.6ReferenceStack-upSpreadtrumConfidential

参考仿真Stack-Up，对于6层一阶PCB走线L1-L2之间的介质厚度最好不要超过75um；L2-L3之间的介质厚度一定不能超过125um；L3-L4之间的介质厚度可以根据情况适当的调整；一般叠层结构近似为对称，因此L4-L6参考L1-L3的意见；Stack-UpSuggestion.7SpreadtrumConfidential

电源走线尽量短且宽；各电源的去耦电容靠近BB摆放，接地端通过孔与主地连接；VDDARM最好是用平面形式连接电源和去耦电容；VDDARM宽度不小于2mm，VDDCORE和VDDMEM宽度不小于1.5mm。电源相临层必须有完整的参考地，上下两层均有完整的地平面为最好。2.PISuggestion.8SpreadtrumConfidential

PISimulationModel .92024/8/18Setup: ShortedatpointA,simulatetheeffectiveinductanceandDCR. Theinputimpedancemustlowerthantargetimpedance. Thetargetimpedanceisourexperiencevalue.SpreadtrumConfidential

PIResult(1)_VDDARM.102024/8/18DCR(mohm)EffectiveInductance(nh)Target150.72Result7.90.22SummarypassSpreadtrumConfidential

PIResult(2)_VDDCORE.112024/8/18DCR(mohm)EffectiveInductance(nh)Target150.64Result110.23SummarypassSpreadtrumConfidential

PIResult(3)_BBVDDMEM.122024/8/18DCR(mohm)EffectiveInductance(nh)Target200.4Result3.60.28SummarypassSpreadtrumConfidential

PIResult(4)_MEMVDDMEM.132024/8/18DCR(mohm)EffectiveInductance(nh)Target200.48Result2.50.11SummarypassSpreadtrumConfidential

差分线间距保持一倍线宽；Address走线与差分Clock走线长度差控制在+/-3mm以内；Address走线尽量做到单根包地处理，如不能话要保证线间距在3倍线宽以上；Data走线尽量