微电子技术论文7586055.pdfVIP

4302IEEETRANSACTIONSONELECTRONDEVICES,VOL.63,NO.11,NOVEMBER2016

StatisticalWriteStabilityCharacterization

inSRAMCellsatLowSupplyVoltage

HaoQiu,StudentMember,IEEE,KiyoshiTakeuchi,Member,IEEE,TomokoMizutani,YoshikiYamamoto,

HidekiMakiyama,TomohiroYamashita,HidekazuOda,ShiroKamohara,NobuyukiSugii,SeniorMember,IEEE,

TakuyaSaraya,Member,IEEE,MasaharuKobayashi,Member,IEEE,andToshiroHiramoto,Member,IEEE

Abstract—Fourwritestabilitymetricsforthecharacterization

ofsix-transistorSRAMcellswereexperimentallyevaluatedand

comparedatlowsupplyvoltage(V).Asilicon-on-thin-BOX

DD

technologywithreducedbodydopingwasusedtoachievelow

voltageoperation.Itwasconfirmedthatbothbitlineandwordline

methodsarepreferableinthattheyyieldmetricsthatfollow

normaldistributions,whichispracticallybeneficialfortheyield

estimation.Onthecontrary,differentfromathighV,both

DD

writestaticnoisemarginfromwritebutterflycurveandwrite

N-curvecurrent(IW)exhibitnon-normalprobabilitydistribu-

tions.Theoriginsofthenon-normalityareanalyzedindetail.

IndexTerms—Lowvoltage,noisemargin,normaldistri-Fig.1.(a)SchematicofDMA-TEGaccessing6-TSRAM.(b)Cumula-

bution,silicon-on-thin-BOX(SOTB)SRAM,writestabilitytiveplotsof|Vth|ofnFETsandpFETsin4-kbSOTBcells.Drainbias

characterization.|Vds|=50mV.Substratebias:Vbsn=−1VandVbsp=1V.Here,Vth