电子科大微电子考研资料数字逻辑7-4.pdfVIP

State-machinedesign

Sequentiallogicdesignexample

Amode5counter:

Thestatediagramcontainsasinglecycle

with5state,thecircuithasaclockinput,the

onlyoutputwillbe‘1’inlaststate.

Amode5counterdesign

statediagramstate/outputtable

Amode5counterdesign

Stateassignment

binarycodeGraycodeone-hotcode

S000000000001

S100100100010

S201001100100

S301101001000

S410011010000

Q2Q1Q0Q2Q1Q0Q4Q3Q2Q1Q0

Amode5counterdesign

Someguidelinesforstateassignment

Thecodeforinitialstateshouldbeeasily

reset;

Thecodeformostusedstateshouldbe

simplest;

Thecodeforneighboringstateshouldbe

neighboring.

Constructthetransition/outputtable

binarycode

one-hotcode

Graycode

Minimizethelogicequations

Excitationtable

forbinarycode

minimalcostminimalrisk

COQ2COQ2Q1Q0

D2=Q1Q0D2=Q2Q1Q0

D1=Q1Q0+Q1Q0D1=Q2Q1Q0+Q2Q1Q0

D0=Q2Q0D0Q2Q0

Unusedtermtodon’tcaretermUnusedtermtoinitialterm

Minimalcircuitofmode5counter

minimalcostminimalrisk

Minimizethelogicequations

Theriskcheck:thefullstatestransition

minimalcostminimalrisk

CO=Q2