毕业论文：基于FPGA来完成直接数字频率合成器的设计（终稿）.doc

摘要 在信号发生器的设计中,传统的用分立元件或通用数字电路元件设计电子线路的方法设计周期长,花费大,可移植性差。本设计是利用EDA技术设计的电路, 该信号发生器输出信号的频率范围为20Hz～20KHz，幅度的峰-峰值为0.3V～5V两路信号之间可实现0°～359°的相位差。 侧重叙述了用FPGA来完成直接数字频率合成器(DDS)的设计,DDS由相位累加器和正弦ROM查找表两个功能块组成,其中ROM查找表由兆功能模块LPM_ROM来实现。而通过设定不同的累加器初值(K1)和初始相位值(K2)，可以调节两路相同频率正弦信号之间的相位差traditional method, which designs electronic circuits using discrete components or general digital circuits components, takes a long time with high cost, what’s more, the transplanting ability of it is unsatisfactory. In this design, the circuit is designed by means of EDA. Its output frequency range is 20Hz to 20KHz with an output amplitude range of 0.3V to 5V(P-P), and the phase difference between two outputs of the two sine signals can be modulated from 0皌o 359? The thesis emphasizing discusses the designing of DDS basing on FPGA. DDS is made up of the phrase accumulator and sine ROM looking-up table, which is realized by functional EAB chip. And through setting different initial accumulator value (K1) and initial phrase value (K2), the difference of phrase between the two sine signals can be changed. As a result, two serials of sine signals with changeable digital frequency, phrase and magnitude are produced. At last, we can show the total course and result with MAX+plusII. Compared with traditional methods of frequency synthesizing, direct digital frequency synthesizing (DDS) has lots of advantages, such as short time of quick frequency exchanging, high frequency resolution, continuous phase changing, etc. Micro-control unit has is characterized by. Many drawbacks can be overcome and a good DDS system with good performance can be developed after combining the flexible control capability of micro-control unit with high performance and integration of the FPGA devices in the same system. Keywords: MCU, FPGA, DDS, ROM sine wave generator, VHDL 目录 摘要 I Abstract II 1 绪言 1.1 课题背景 1 1.2 课题研究的目的和意义 1 1.3 国内外概况 2 1.4 课题的主要研究工作 3 2 系统设计方案的研究 2.1 系统的性能要求 4 2.2 系统实现的原理 4 2.2.1 DDS的基本原理 5 2.2.2 FPGA实现的直接数字频率合成