(毕业论文)基于Allegro_SPB的八路抢答器电路板的设计与仿真.docVIP

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(毕业论文)基于Allegro_SPB的八路抢答器电路板的设计与仿真.doc

学 年 论 文 基于Allegro SPB的八路抢答器电路板的 设计与仿真 Based on the Allegro SPB Eight-channel responder circuit board design and simulation 专 业: 电子科学与技术 姓 名: 学 号: 指导老师: 2013 年1 月7 日 信息与通信技术系 【摘要】介绍了数码显示八路抢答器电路的组成、设计及功能,电路采用74系列常用集成电路进行设计。该抢答器除具有基本的抢答功能外,还具有定时、计时和报警功能。主持人通过时间预设开关预设供抢答的时间,系统将完成自动倒计时。若在规定的时间内有人抢答,则计时将自动停止;若在规定的时间内无人抢答,则系统中的蜂鸣器将发响,提示主持人本轮抢答无效,实现报警功能,若超过抢答时间则抢答无效。 该抢答器主要运用到了编码器,译码器和锁存器:它采用74LS148来实现抢答器的选号,采用74LS279芯片实现对号码的锁存,采用74LS192实现十进制的减法计数,采用555芯片产生秒脉冲信号来共同实现倒计时功能,采用74LS121单稳态芯片来实现报警信号的输出。 通过课程设计提高和巩固了所学的专业知识,以及知识的综合应用和焊接技术。 【关键词】抢答器 编码 译码 定时 报警 [ Abstract ] Introduces digital display, design and function of eight Responder circuit, circuit using 74 series of common integrated circuit design. The responder addition to a basic function, also has the timing, timing and alarm function. The default host for switching the default answer time by time, the system will complete the automatic countdown. If the stipulated time someone vies to answer first, then the time will automatically stop; if nobody answer the question on time, the system will send the buzzer rang, indicating that the host this contest null and void, realize alarm function, if more than the answer answer invalid time. The responder is used mainly to the encoder, decoder and latch: it uses 74LS148 to achieve Responder selection, the number of latches using 74LS279 chip, using 74LS192 to achieve the subtraction counting decimal, using 555 chip to produce the second pulse signal to realize the countdown function, to achieve the output alarm signal using 74LS121 monostable chip. Through courses designed to enhance and consolidate the knowledge of professional knowledge, as well as the synthesis and application of knowledge of welding technology. [ keywords ] Responder coding decoding timing alarm 目 录 引 言 1 一 八路抢答器设计与要求 2 二

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