Number Systems.ppt

Exclusive OR (XOR) Either A or B, but not both This is sometimes called the inequality detector, because the result will be 0 when the inputs are the same and 1 when they are different. The truth table is the same as for S on Binary Addition. S = A ? B A B S 0 0 0 1 0 1 0 1 1 1 1 0 Getting the XOR A B S 0 0 0 1 0 1 0 1 1 1 1 0 Two ways of getting S = 1 Circuit for XOR Accumulating our results: Binary addition is the result of XOR plus AND Half Adder Called a half adder because we haven’t allowed for any carry bit on input. In elementary addition of numbers, we always need to allow for a carry from one column to the next. 18 25 4 3 (plus a carry) Half Adder Full Adder INPUTS OUTPUTS A B CIN COUT S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 Full Adder Circuit Chaining the Full Adder Possible to use the same scheme for subtraction by noting that A – B = A + (-B) Binary Counting Use 1 for ON Use 0 for OFF =So our example has 25 + 23 + 21 + 20 = 32 + 8 + 2 + 1 = 43 Counting in Binary 1 1 11 1011 21 10101 2 10 12 1100 22 10110 3 11 13 1101 23 10111 4 100 14 1110 24 11000 5 101 15 1111 25 11001 6 110 16 10000 26 11010 7 111 17 10001 27 11011 8 1000 18 10010 28 11100 9 1001 19 10011 29 11101 10 1010 20 10100 30 11110 NAND (NOT AND) A B Q 0 0 1 0 1 1 1 0 1 1 1 0 NOR (NOT OR) A B Q 0 0 1 0 1 0 1 0 0 1 1 0 DeMorgan’s Theorem A NAND gate is equivalent to an inversion followed by an OR A NOR gate is equivalent to an inversion followed by and AND DeMorgan Truth Table NAND NOR Exclusive NOR A B Q 0 0 1 0 1 0 1 0 0 1 1 1 Equality Detector Summary Summary for all 2-input gates Inputs Output of each gate ?A? ?B? AND NAND ?OR? NOR XOR XNOR 0 0 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 0 1 1 0 1 0 1 1 1 0 1 0 0 1 Logic Gates and Symbols AND NAND More Gates and Symbols NOR NOT OR And More XOR NXOR Multi-input Gates Three input OR Logic Gate ICs Example 7400 More ICs And More Number Systems Decimal (base 10) {0 1 2 3 4 5 6 7 8 9} Place value giv