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a scalable design for vlsi dictionary machines:超大规模集成电路字典机的可扩展设计
*H
I
__ Microprocessing
__
and
k!!B Microprogramming
ELSEVIER Microprocessingand Microprogramming41 ( 1995) 359-372
A scalable design for VLSI dictionary machines *
Thibault Duboux, Afonso Ferreira ‘, Michel Gastaldo
Laboratoire de l’lnformatique du ParaMisme, URA 1398 du CNRS, Ecole Normale Supieure de Lyon, 69364 Lyon Cedex 07, France
Abstract
Most of the proposed VLSI dictionary machines appearing in the literature were designed to fit in one chip only. If the
number of acquired elements is larger than that of VLSI cells, another chip has to be designed and manufactured to take
a larger dictionary into account. In this paper, we propose a new design for dictionary machines that assembles blocks of
standard existing dictionary machines. Our machine is as efficient as the best machines described in the literature, with the
enormous advantage of scaling up quite easily, with no degradation of its performance, by simply adding more and more
standard blocks.
Keywords: Dictionary machine; VLSI; Load balancing; Paralleldata structures
1. Introduction Note that some of these operations require a response
to be produced.
The dictionary is an important data structure used The dictionary task can be loosely defined as the
in applications suc
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