Silabs C851F850 BLDC马达参考设计.docx

Silabs C8051F850 BLDC马达参考设计 关键字：工业控制,马达控制,BLDC Silabs公司的C8051F85x/6x是嵌入高效增强性8051流水线架构CPU核的MCU,25MHzs时钟和高达25MIPS吞吐量,采用标准的8051指令集,闪存高达8KB,多达512B RAM,具有多达12路输入ADC,2个模拟比较器和片上调试,通信接口包括UART,SPI和I2C / SMBus,工作电压2.2V-3.6V,主要用在无刷DC马车驱动,FTTH和FTTH网络,传感器接口以及照明系统,机顶盒和投映仪.本文介绍了C8051F85x/6x主要特性,框图以及三相BLDC马达驱动系统模型图, C8051F850 BLDC马达参考设计主要特性,框图,动力板和MCU板电路图与材料清单.The C8051F85x/6x MCUs are an ideal fit for low-memory, low-pin count applications. These MCUs feature a highly-efficient, enhanced 8051 pipelined architecture CPU core which executes 70% of the instructions in 1-2 system clock cycles.The C8051F85x/6x family takes functional density to the next level by integrating advanced analog, digital and communication peripherals as well as precision oscillators into highly cost-effective QFN20(3 mm x 3 mm), QSOP24 and SOIC16 packages. The MCU architecture also features a patented crossbar that enables developers to choose peripherals and pinout placement based on their application needs and layout constraints without worrying about the pre-set limitations and pin conflicts - allowing usage of small pinout packages, simplifying PCB routing, minimizing PCB layers and ultimately reducing design time, lowering system cost and most importantly optimal usage of pins. These on-chip features enable developers to minimize external components resulting in significantly reduced solution cost as compared to competitive MCUs.C8051F85x/6x主要特性:Memory?- Up to 8 kB flash?- Flash is in-system programmable in 512-Byte sectors?- Up to 512 Bytes RAM (256 + 256)On-Chip Debug?- On-chip debug circuitry facilitates full speed, non-intrusive in-system debug(no emulator required)- Provides breakpoints, single stepping, inspect/modify memory and registers12-Bit Analog-to-Digital Converter?- Up to 16 input channels?- Up to 200 ksps 12-bit mode or 800 ksps 10-bit mode- Internal VREF or external VREF supportedInternal Low-Power Oscillator?- Calibrated to 24.5 MHz?- Low supply current?- ±2% accur