数字集成电路原理chapter1.ppt

* Defects a is approximately 3 * Some Examples (1994) Chip Metal layers Line width Wafer cost Def./ cm2 Area mm2 Dies/wafer Yield Die cost 386DX 2 0.90 $900 1.0 43 360 71% $4 486 DX2 3 0.80 $1200 1.0 81 181 54% $12 Power PC 601 4 0.80 $1700 1.3 121 115 28% $53 HP PA 7100 3 0.80 $1300 1.0 196 66 27% $73 DEC Alpha 3 0.70 $1500 1.2 234 53 19% $149 Super Sparc 3 0.70 $1700 1.6 256 48 13% $272 Pentium 3 0.80 $1500 1.5 296 40 9% $417 * Reliability―Noise in Digital Integrated Circuits i ( t ) Inductive coupling Capacitive coupling Power and ground noise v ( t ) V DD * DC OperationVoltage Transfer Characteristic V(x) V(y) V OH V OL V M V OH V OL f V(y)=V(x) Switching Threshold Nominal Voltage Levels VOH = f(VOL) VOL = f(VOH) VM = f(VM) * Mapping between analog and digital signals V IL V IH V in Slope = -1 Slope = -1 V OL V OH V out “ 0 ” V OL V IL V IH V OH Undefined Region “ 1 ” * Definition of Noise Margins Noise margin high Noise margin low V IH V IL UndefinedRegion 1 0 V OH V OL NM H NM L Gate Output Gate Input * Noise Budget Allocates gross noise margin to expected sources of noise Sources: supply noise, cross talk, interference, offset Differentiate between fixed and proportional noise sources * Key Reliability Properties Absolute noise margin values are deceptive a floating node is more easily disturbed than a node driven by a low impedance (in terms of voltage) Noise immunity is the more important metric – the capability to suppress noise sources Key metrics: Noise transfer functions, Output impedance of the driver and input impedance of the receiver; * Regenerative Property Regenerative Non-Regenerative * Regenerative Property A chain of inverters v 0 v 1 v 2 v 3 v 4 v 5 v 6 Simulated response * Fan-in and Fan-out N Fan-out N Fan-in M M * The Ideal Gate R i = ￥ R o = 0 Fanout = ￥ NMH = NML = VDD/2 g = ? V in V out * An Old-time Inverter NM H V in (V) V out (V) NM L V M 0.0 1.0 2.0 3.0 4.0 5.0 1.0 2.0 3.0 4.0 5.0 * Delay Definitions * Ring O