第三讲操作系统运行机制讲述.pptVIP

College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / 在计算机系统中，不同的中断源可能在同一时刻发出中断信号，也可能前一中断还未处理完，紧接着又发生了新的中断，为了区分和不丢失每个中断信号，通常用一些固定的触发器来寄存它们，并规定其值为1是表示有中断信号，为0时无中断信号，这些寄存中断的全部触发器称为“中断寄存器”，其中每个触发器称为一个中断位，为了控制方便，一般对中断寄存器的各位进行顺序编号，并称之为“中断序号，如图所示,”从左至右的编号。 在计算机系统中，不同的中断源可能在同一时刻发出中断信号，也可能前一中断还未处理完，紧接着又发生了新的中断，为了区分和不丢失每个中断信号，通常用一些固定的触发器来寄存它们，并规定其值为1是表示有中断信号，为0时无中断信号，这些寄存中断的全部触发器称为“中断寄存器”， 当前计算机所用的可编程中断控制器（8259）处理机在核心态下可执行特权指令设置可编程中断控制器的屏蔽码，硬件即使发现屏蔽码置0的中断位有了中断也不会通知处理机，这类被禁止响应的中断一旦发生时，硬件保存此次中断，以便将来屏蔽解除时处理。 处理机在执行任何指令时都有可能发生中断或陷入，那么CPU如何知晓它们？响应它们？又是如何处理它们的呢？这就涉及到我们接下来的内容----中断陷入响应和处理。 CPU的运行状态分为核心态和用户态 College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and Engineering / College of Technology and E