上海海事大学数字逻辑试卷.docVIP

上 海 海 事 大 学 试 卷 2010 — 2011 学年第二学期期末考试 《 数字逻辑（digital logic） 》（A卷） 班级 学号 姓名 总分 题 目 得 分 阅卷人 一、填空题 (每空1分，共15分)请将正确答案写在题目中的括号内。 1、The period(周期) of the waveform below is _______, and its frequency(频率) is ________. 2、(1110)B= _________D ; (27) Q= _________B; 156= ________________8421BCD; 3、The output of sequential logic circuit not only depends on the current inputs but also depends on the_________. 4、A 3-variable Karnaugh map has_________ cells. 5、A 3-bit binary counter has a maximum modulus(模) of_________, A modulus-20 counter must have at least _________flip-flops. A modulus-10 ring counter(环形计数器) requires _________flip-flops. 6、The frequency of the waveform at ① is_________ and at ② is_________, and the overall modulus is _________. 7、An input variable combination that can not occur (or not allowed) can be treated as ______ . 8、A device consists of arrangements of flip-flops which can be used to store and shift data calls a_________. 二、 选择题（每题1分，共计10分） 1、The term bit means( ) (A) A small amount of data (B) a 1 or a 0 (C) binary digit (D) both answers (B) and (C) 2、All Boolean expression can be implemented with（ ） (A) NAND gates only (B) NOR gates only (C) combinations of AND gates, OR gates, and inverters (D) any of these 3、The modulus of a Johnson counter(扭环型计数器) with n flip-flops is（ ）. (A) n (B)2n (C) 2n－1 (D)2n-2n 4、A 4-bit parallel adder can add（ ） (A) four bits in sequence (B) two 2-bit binary numbers (C) two 4-bit binary numbers (D) four bits at a time 5、An asynchronous(异步) counter differs from a synchronous(同步) counter in（ ） (A) the number of states in its sequence (B) the method of clocking (C) the type of flip-flops used (D) the value of the modulus 6、The circuit without invalid state is（ ） (A) the S-R latch (B) the gated S-R latch (C)the edge-