Efficient Resource Sharing in Concurrent Error Detecting并发差错检测中的有效资源共享.pptVIP

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2017-06-15 发布于上海
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Efficient Resource Sharing in Concurrent Error Detecting并发差错检测中的有效资源共享.ppt

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ISCA 2005 panel onChip multiprocessors are here.But, where are the threads? Babak Falsafi Computer Architecture Lab (CALCM) Carnegie Mellon End of Single Thread Era? 1. Hand program them? 40-years, still not mainstream Limited to skilled folks Need to think parallel at all stack levels Algorithms, languages, systems, etc. Not your typical undergrad curriculum Decomposition first, PRAM, or dataflow? Is Transactional Memory the right solution to the wrong problem? Is this an architecture problem? 2. Automatically parallelize? Parallelizing compilers/languages: 30-year effort, modest results Works for data-parallel Thread-Level Speculation: 15-year effort, less than modest results Less than 10% speedup with 4 cores Hand tuning helps but doesn’t solve the problem 3. Use them for helpers/nannies? Performance: Precomputation, slipstream, microthreading,… E.g., better memory, branch performance Similar success/failure as TLS Functionality: Garbage collection, reliability, security How many nannies does a program need? Is this an effective use of real-estate? Our Distinguished Panel * * ? 2005 Babak Falsafi OoO Multithreaded cores Superscalar RISC First Cores Multiple cores Good news: 1 TIPS by 2010 Bad news: where is the “I” in TIPS? Mr. Multiscalar Mr. Niagara Mr. Supercompiler Michael Wolfe Mr. Transaction Mr. Impact Mr. Stampede *