Testing in the Fourth Dimension CS Course Webpages测试在第四维的CS课程网页.pptVIP

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Testing in the Fourth Dimension CS Course Webpages测试在第四维的CS课程网页.ppt

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Testing in the Fourth Dimension CS Course Webpages测试在第四维的CS课程网页

* Lecture 7Combinational Automatic Test-Pattern Generation (ATPG) for SAF - Basics Algorithms and representations Structural vs. functional test Definitions Search spaces Completeness Algebras Types of Algorithms Original slides copyright by Mike Bushnell and Vishwani Agrawal * Origins of Stuck-Faults Eldred (1959) – First use of structural testing for the Honeywell Datamatic 1000 computer Galey, Norby, Roth (1961) – First publication of stuck-at-0 and stuck-at-1 faults Seshu Freeman (1962) – Use of stuck-faults for parallel fault simulation Poage (1963) – Theoretical analysis of stuck-at faults * Functional vs. Structural ATPG * Carry Circuit * Functional vs. Structural(Continued) Functional ATPG – generate complete set of tests for circuit input-output combinations 129 inputs, 65 outputs: 2129 = 680,564,733,841,876,926,926,749, 214,863,536,422,912 patterns Using 1 GHz ATE, would take 2.15 x 1022 years Structural test: No redundant adder hardware, 64 bit slices Each with 27 faults (using fault equivalence) At most 64 x 27 = 1728 faults (tests) Takes 0.000001728 s on 1 GHz ATE Designer gives small set of functional tests – augment with structural tests to boost coverage to 98+ % * Definition of Automatic Test Pattern Generator Operations on digital hardware: Inject fault into circuit modeled in computer Use various ways to activate and propagate fault effect through hardware to circuit output Output flips from expected to faulty signal Electron-beam (E-beam) test observes internal signals – “picture” of nodes charged to 0 and 1 in different colors Too expensive Scan design – add test hardware to all flip-flops to make them a giant shift register in test mode Can shift state in, scan state out Widely used – makes sequential test combinational Costs: 5 to 20% chip area, circuit delay, extra pin, longer test sequence * Circuit and Binary Decision Tree * Binary Decision Diagram BDD – Follow path from source to sink node – product of literals al