74HC11D(三3输入与门).pdf

DATA SHEET Product specification File under Integrated Circuits, IC06 December 1990 INTEGRATED CIRCUITS 74HC/HCT11 Triple 3-input AND gate For a complete data sheet, please also download: ? The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications ? The IC06 74HC/HCT/HCU/HCMOS Logic Package Information ? The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines December 1990 2 Philips Semiconductors Product specification Triple 3-input AND gate 74HC/HCT11 FEATURES ? Output capability: standard ? ICC category: SSI GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns Notes 1. CPD is used to determine the dynamic power dissipation (PD in μW): PD = CPD × VCC 2 × fi + ∑ (CL × VCC 2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V ∑ (CL × VCC 2 × fo) = sum of outputs 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC ? 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL/ tPLH propagation delay nA, nB, nC to nY CL = 15 pF; VCC = 5 V 10 11 ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per gate notes 1 and 2 18 20 pF December 1990 3 Philips Semiconductors Product specification Triple 3-input AND gate 74HC/HCT11 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 3, 9 1A to 3A data inputs 2, 4, 10 1B to 3B data inputs 7 GND ground (0 V) 12, 6, 8 1Y to 3Y data outputs 13, 5, 11 1C to 3C data inputs 14 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. Fig.4 Functional diagram. Fig.5 Logic diagram (one gate). FUNCTION TABLE Notes 1. H = HIGH voltage level L = LOW voltage level I