AT24c04 的datasheet.pdfVIP

1Features ? Medium-voltage and Standard-voltage Operation – 5.0 (VCC = 4.5V to 5.5V) – 2.7 (VCC = 2.7V to 5.5V) ? Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) ? Two-wire Serial Interface ? Schmitt Trigger, Filtered Inputs for Noise Suppression ? Bi-directional Data Transfer Protocol ? 100 kHz (2.7V) and 400 kHz (5V) Compatibility ? Write Protect Pin for Hardware Data Protection ? 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes ? Partial Page Writes are Allowed ? Self-timed Write Cycle (5 ms max) ? High-reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years ? 8-lead PDIP and 8-lead JEDEC SOIC Packages Description The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec- trically erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many automotive applications where low-power and low-voltage operation are essential. The AT24C01A/02/04/08/16 is available in space-saving 8-lead PDIP and 8-lead JEDEC SOIC packages and is accessed via a two-wire serial interface. In addition, the entire family is available in 5.0V (4.5V to 5.5V) and 2.7V (2.7V to 5.5V) versions. Table 1. Pin Configuration Pin Name Function A0 - A2 Address Inputs SDA Serial Data SCL Serial Clock Input WP Write Protect NC No Connect Two-wire Automotive Serial EEPROM 1K (128 x 8) 2K (256 x 8) 4K (512 x 8) 8K (1024 x 8) 16K (2048 x 8) AT24C01A AT24C02 AT24C04 AT24C08(1) AT24C16(2) 3256F–SEEPR–10/04 Note: 1. This device is not recom- mended for new designs. Please refer to AT24C08A. 2. This device is not recom- mended for new designs. Please refer to AT24C16A. 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA 8-lead PDIP 8-lead SOIC 1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA 查询AT24C01A_04供应商 2 AT24C01A/02/04/08/16 3256F–SEEPR–10/04 Figure 1. Block Diagram Pin Description SERIAL CLOCK (SCL): The SCL input is used to