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CMOS芯片原理和产品介绍.ppt

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CMOS芯片原理和产品介绍

CMOS 图像传感器基本结构 CMOS 芯片实例 CMOS 图像传感器基本结构- 无源 (1T) 像元结构 CMOS 图像传感器基本结构- 有源 (3T) 像元结构 CMOS 图像传感器基本结构- 有源 (4T) 像元结构 CMOS 图像传感器基本结构- 有源 (5T) 像元结构 CMOS 图像传感器基本结构- 有源 (6T) 像元结构 CMOS 图像传感器基本结构 CMOS 芯片的特性功能 CMOS 芯片的特性功能 CMOS 芯片的特性功能 CMOS 芯片的特性功能 CMOS 芯片的特性功能 CMOS芯片分类标准 CMOS 相机结构 IT-CCD and Basic CMOS Architecture CMOS Imager vs. CCD CMOS allows high system integration Level CMOS Imager Architecture Main Challenges in CMOS Pixels Extremely low leakage current and FPN (imager is the most critical device for CMOS technology) Low noise adding of “charge packets” (=binning), used for resolution reduction (pre-view, etc.). Easy to implement in CCD (operates in charge domain) but not straightforward in CMOS (voltage or current domain). In an extreme this is also used for TDI devices (step too far for CMOS?) Improved light angle dependency by stack height lowering, preventing cross color: ore severe for small pixels Scanning: CCD takes a snapshot (all pixels integrate at the same time); basic CMOS has a rolling shutter (all pixels integrate for the same time, but starting CCDs takes a snapshot CMOS has a rolling shutter maybe snapshot becomes viable in the near future Some CCD Limitations Fabrication process tailored at high quantum efficiency, high dynamic range, low dark current and high uniformity BUT… Requires high transfer efficiency Special (=costly) fabrication process Large voltage swings, different voltage levels Difficult to integrate on-chip timing, control, drive and signal chain electronics ? Multi chip module High system power Serial readout only (less flexibility) CMOS is Excellent Alternative ! Lower sensor- and system Cost Higher yields; “Standard” processes (driven by baseline/Logic) High integration level (very compact “camera on chip”) High Image Performance Becoming competitive with CCD (driven by mobile phone market); closing gap rapidly in more professional markets Innovation speed much higher than for CCD High Speed, High Flexibility (random access a

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