EnablingGPGPULow-LevelHardware重点.PDFVIP

Enabling GPGPU Low-Level Hardware Explorations with MIAOW: An Open-Source RTL Implementation of a GPGPU RAGHURAMAN BALASUBRAMANIAN, VINAY GANGADHAR, ZILIANG GUO, CHEN-HAN HO, CHERIN JOSEPH, and JAIKRISHNAN MENON, University of Wisconsin-Madison MARIO PAULO DRUMOND, University of Wisconsin-Madison and Universidade Federal de Minas Gerais ROBIN PAUL, SHARATH PRASAD, PRADIP VALATHOL, and KARTHIKEYAN SANKARALINGAM, University of Wisconsin-Madison 21 Graphic processing unit (GPU)-based general-purpose computing is developing as a viable alternative to CPU-based computing in many domains. Today’s tools for GPU analysis include simulators like GPGPU- Sim, Multi2Sim, and Barra. While useful for modeling first-order effects, these tools do not provide a detailed view of GPU microarchitecture and physical design. Further, as GPGPU research evolves, design ideas and modifications demand detailed estimates of impact on overall area and power. Fueled by this need, we introduce MIAOW (Many-core Integrated Accelerator Of Wisconsin), an open-source RTL implementation of the AMD Southern Islands GPGPU ISA, capable of running unmodified OpenCL-based applications. We present our design motivated by our goals to create a realistic, flexible, OpenCL-compatible GPGPU, capable of emulating a full system. We first explore if MIAOW is realistic and then use four case studies to show that MIAOW enables the following: physical design perspective to “traditional” microarchitecture, new types of research exploration, and validation/calibration of simulator-based characterization of hardware. The findings and ideas are contributions in their own right, in addition to MIAOW’s utility as a tool for others’ research. Categories and Subject Descriptors: C.1.4 [Computer Systems Organization]: Parallel Architectures General Terms: Design, Performance Additional Key Words and Phrases: GPU, ma