IIC（国外英文资料）.docVIP

IIC a module clk. scl. sda. is _ n ); input clk, rst _ n. output scl. output [7: 0]). inout sda. reg (2: 0) cnt; / / cnt = 0, scl上升沿; cnt = 1, scl高电平中间; cnt = 2, scl下降沿 scl低电平中间 cnt = 3; [8]: 0 reg cnt _ sum; / / 产生iic所需要的时钟 reg? _ r; / / 产生的时钟脉冲 [19]. 10ms cnt _: 0. always @ (posedge clk or negedge is _ (n). if (! is _ (n). cnt (_ 10ms = 20. else 10ms cnt cnt _ 10ms _ = + 1 b1. always @ (posedge clk or negedge is _ (n). begin if (! is _ (n). cnt _ sum = 0; else if (a = = 9, have _ d499) cnt _ sum = 0; else _ cnt cnt sum = sum + 1 _ b1. end always @ (posedge clk or negedge is _ (n). begin if (! is _ (n). cnt = 3 d; else begin box (cnt _ sum) 9: 3 d124 cnt = d1; / / 高电平 9: 3 d249 cnt = d2 / 下降沿. 9: 3 d374 cnt = d3; / / 低电平 9 d499 cnt = 3 (); / / 上升沿 default: cnt = 3 d; endcase end end to define scl _ (cnt = = 3 (p) to define scl _ hig (cnt = = 3). to define scl _ neg (cnt = = 3 d) to define scl _ low (cnt = = 3.) always @ (posedge clk or negedge is _ (n). begin if (! is _ (n). scl _ r = 1 b0. else if (a = = 3 (cnt) scl _ r = 1 b1. else if (a = = 3 d (cnt) scl _ r = 1 b0. end scl = scl _% r; / / scl时钟信号 to define device _ read 8 / 寻址器件 读操作 hd1. to define device _ write 8 hd0 / 寻址器件, 写操作 to define the acc _ xh 8 / 加速度x轴高位地址 box to define the acc _ xl 8 / 加速度x轴低位地址 h3c to define the acc _ finland 8 / 加速度y轴高位地址 h3d to define the acc _ [8 / 加速度y轴低位地址 h3e to define the acc _ h3f / 加速度z轴高位地址) 8 to define the acc _ zl 8 10 / 加速度z轴低位地址 to define the gyro _ h43 / 陀螺仪x轴高位地址 xh) to define the gyro _ h44 / 陀螺仪x轴低位地址 xl 8 to define the gyro _ finland 8 / 陀螺仪y轴高位地址 h45 to define this gyro _ yl 8 / 陀螺仪y轴低位地址 to define the gyro _) 8 / 陀螺仪z轴高位地址 h47 to define the gyro _ dz 8 / 陀螺仪z轴低位地址 h48 / / / / / / / / / / / / / / 陀螺仪初始化寄存器 to define: 1) h6b _ _ mgmt to define smplrt _ div 8 h19 to define config1 8 h1a to define the gyro 8 h1b _ config to define the acc _ 8 h1c config / / / / / / / / / / / / / / 陀螺仪初始化对应寄存器值配置 to define: 1 _ _ mgmt _ val 8 9 `定义smplrt_div_val 8h07 `定义config1_v