时序电路设计ASM.ppt

Copyright reserved by Prof. Luo, Tsinghua Univ. Synchronous Sequential Circuits Analysis of Synchronous SSLC Design of Synchronous SSLC The reverse of analysis Classical approach (State diagrams) Flowchart approach (analogous to those used in computer programming) References: Handouts; Victor P. Nelson, Digital Logic Circuit Analysis and Design, 清华大学出版社, 1997, pp547~552 Algorithmic State Machines Algorithmic State Machine (ASM) ASM Charts State Assignments ASM Tables ASM Realizations Algorithmic State Machine (ASM) Partitioning of Digital System Model of ASM Timing of ASM ASM Versa Mealy/Moore Partitioning of Digital System Two Applications of ASM Model of ASM Timing of ASM ASM Versa Mealy/Moore ASM Charts A block diagram structure superficially similar to the flowcharts used in software design What’s the difference? Three Basic Components ASM Blocks ASM Charts State Diagram versa ASM Charts What’s the difference? Time Interpretation Software: describe the sequence of events/tasks ASM: describe a sequence of time intervals Each ASM Block with a collection of boxlike symbols corresponds to a single time interval, i.e., a state time Three Basic Components State Box Decision Box Conditional Output Box Decision Box Provide for next state alternatives and conditional outputs based on the logic value of a Boolean expression involving the external inputs and the status information Conditional Output Box From a decision box, to a decision/state box No time dependence as the decision box ASM Blocks Construct using the basic ASM components Consist of the interconnection of a single state box along with a collection of decision and conditional output boxes One entry path, one or more exit paths Link path: a path through an ASM block from its state box to an exit path ASM Blocks Equivalent ASM Blocks ASM Charts Binary Multiplier Conventional multiplication The number of bits in the product of two N-bits integers is 2N bits Alternate approach Add + Shift The number of bits i