基于Simplorer的锁相环电路建模与仿真分析 - 湖北民族学院团队科研.PDF

2 8 2 () Vo.l2 8　No.2 20 10 6 JournalofHubeiUniversityforNationalities(NaturalScienceEdition) Jun.2010 Simplorer 1 2 , (1.湖北民族学院附属医院, 湖北恩施 445000; 2.湖北民族学院信息工程学院, 湖北恩施 44 5000 ) :提出了一种基于 Smiplorer7.0 实现锁相环电路的仿 分析方法, 通过对锁相环电路进行数学分析, 采用 VHDL-A S语言对鉴相器、环路滤波器、压控振荡器等进行行为级建模, 在此基础上, 架构了锁相环模型, 并对其 进行分析.从仿 结果可以得出, 利用 VHDL-A S对模型行为级建模, 具有概念清晰、仿 简捷、高效. :锁相环;VHDL-A S;smiplore;r行为级建模 :TP274 :A :1008-8423 (20 10 )02-0163-04 odelingandSmiulationofPhaseLockedLoopCircuitsBasedonSimplorer 1 2 WUChang-kun, LIAOHong-hua (1.UniversityHospitalofHubeiUniversityforNationalitie,sEnshi44 5000, China; 2.SchoolofInformationEngineering, HubeiUniversityforNationalitie,sEnshi44 5000, China) Abstrac:tAsmiulationmethodofphaselockedloop(PLL)circuitsbasedonSmiplorer7.0 ispresen- ted.ByanalyzingthemathematicalmodelofPLL, andthebehavior- levelmodelsfphasedetector (PD), loopfiliter(LF), voltagecontrolledoscillator(VCO)basedonVHDL-A Slanguageare buil,tandonthisbasi,sthePLLmodelisconstructed.Smiultaneously, thePLLcircuitsmodelisana- lyzed.Thesmiulationresultsshowthatithastheadvantageofclearmodelconcep,tsmiplesmiulationand highefficiencybasedonVHDL-A Slanguageforthemodelbehaviorlevelmodeling. Keywords:phaselockedloop(PLL);VHDL-A S;smiplore;rbehaviorlevelmodeling (Phase-LockedLoop, PLL) , .PLL、、、 [1 ～6] .、、, A 、、、. , , VHDL-A S, SImplor- e7r.0 , . 1　 、 [7] . 1., u(t) u(t), o r 1　 Fig.1　ThebasicstructureofPLL :20 10 -05-02. :(D20 10 1903 );(Y2008T002