中断异常处理流程（Interrupt the exception handling process）.docVIP

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中断异常处理流程（Interrupt the exception handling process）.doc

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中断异常处理流程（Interrupt the exception handling process） In a computer architecture, exceptions or interrupts are a mechanism for dealing with unexpected events in the system, and almost all processors provide this mechanism. An exception is mainly a description of the Angle of the processors passive acceptance, an exception caused by an unexpected operation. The interruption has the meaning of applying actively to the processor. But there is a common thread in both cases, which is that the request processor interrupts the normal program execution process and enters a particular program. If there is no special explanation, there is no strict distinction between abnormal and interruption. This paper analyzes the interrupt processing flow of ARM9 by combining the actual verified code, and designs an external interrupt handler based on S3C2410 chip. 1. Abnormal interrupt response and return An exception may occur at any time when the system is running. When an exception occurs, the ARM microprocessor performs the following steps: 1) the address of the next instruction is stored in the corresponding connection register LR so that the program can resume execution from the correct location when handling the exception return. 2) copy the CPSR into the corresponding SPSR. 3) force the operation mode of CPSR to be set according to the exception type. 4) force the PC to take the next instruction from the associated abnormal vector address and jump to the corresponding exception handler. These tasks are done by the ARM kernel and do not require user program participation. After the exception is handled, the ARM microprocessor performs the following steps to return from the exception: 1) send the value of the connection register LR minus the corresponding offset to the PC. 2) copy the SPSR back into the CPSR. 3) if the interrupt stop is set when entering the exception handling, you should clear it here. These jobs must be implemented by the user in the interrupt handler function. In