电镀焊球凸点工艺.pptVIP

Electroplating Solder Bumping Flip Chip Technology电镀焊球凸点倒装焊技术 Electroplating Solder Bumping Process电镀焊球凸点工艺 Process Flow of Electroplating Solder Bump 电镀焊球凸点工艺流程 Process Specification工艺参数 Flip Chip on Low-Cost Substrate Samples Stencil Printing Bumping Flip Chip Technology丝网印刷凸点倒装焊技术 Electroless UBM and Stencil Printing化学镀UBM和丝网印刷工艺 The most potential low cost flip chip bumping method. 最具前景的低成本倒装焊凸点制备方法 Using electroless Ni/Au as UBM system 用化学镀镍/金作为凸点下金属层 maskless process 无掩膜工艺 Compatible with SMT process 与表面贴装工艺兼容 Flexible for different solder alloys适用于不同焊料合金 Stencil Printing Process Flow丝网印刷工艺流程 Stencil Printing Process Flow 丝网印刷工艺流程 Sketch of process flow Process Specification 工艺参数 I/O pads with a pitch of 400?m are used for testing dice The limitation of this process is the pitch of 150 ?m. 测试芯片I/O凸点间距：400微米 Thickness of Ni/Au UBM is 5~6?m. Ni/Au UBM厚度：5~6微米 Different solder alloys are available. Solder alloys from different vender: Kester, Multicore, Alpha Metal, Indium,… Different composition: eutectic Pb-Sn, lead free 可应用不同供应商凸点焊料 Samples by Stencil Printing Bumping丝网印刷凸点工艺样品 Reliability Test可靠性测试 Reliability Test Design可靠性测试设计 JEDEC Standard for Test Design JEDEC标准测试设计(Joint Electron Device Engineering Council) Reliability Test Results可靠性测试结果 Both Bumping Process Produce Reliable samples 两种凸点工艺样品的可靠性 Wafer Level Input/Output Redistribution晶片级输入/输出再分布 Wafer Level Input/Output Redistribution Applications 晶片级I/O再分布技术的应用 Convert chips designed for perimeter wirebond to area flip chip bonding. 可转换已设计芯片，由周边丝键合至面分布倒装焊键合 Increase I/O density while increase I/O pitch. 增加I/O密度同时增加I/O间距 Improve reliability and manufacturing yield. 改善可靠性和制造率 Adapt existing chips designed for wirebonding to flip chip. 在现有已设计的丝键合芯片上应用倒装焊技术 Advantages 优点 WL-Input/Output redistribution will eliminate the underfilling process in Flip Chip Technology! 再分布技术可消除倒装焊技术中填充塑封工艺! Redistribute tight pitch perimeter I/O to loose pitch array bonding and increase package re