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comparison of duty cycle generator algorithms for spice simulation of smps比较工作周期发生器算法香料模拟smp
Hindawi Publishing Corporation
Advances in Power Electronics
Volume 2012, Article ID 574289, 8 pages
doi:10.1155/2012/574289
Research Article
Comparison of Duty Cycle Generator Algorithms for
SPICE Simulation of SMPS
Alexander Abramovitz
Department of Electrical Engineering and Computer Science, University of California, Irvine, CA 92697-2625, USA
Correspondence should be addressed to Alexander Abramovitz, alabr@
Received 28 February 2012; Revised 9 April 2012; Accepted 10 April 2012
Academic Editor: Henry S. H. Chung
Copyright © 2012 Alexander Abramovitz. This is an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly
cited.
The paper presents and discusses an algorithm for average modeling of the PWM modulator in switch-mode power systems by
general purpose electronic circuit simulators such as PSPICE. A comparison with previous theoretical models is conducted. To test
the accuracy of the average PWM models comparison to cycle-by-cycle simulation was conducted. The proposed algorithm shows
better accuracy than earlier counterparts.
1. Introduction Average modeling of the power stage can also be helpful in
simulation as they can be readily implemented using PSPICE
Today circuit simulation and computer-aided design are behavioral sources [6–8]. Average models are continuous
universally accepted engineering tools and have become and, hence, can be automatically linearized by the PSPICE
industry standard method of product development. Two simulator and prepared for the fr
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