dspsfpgas comparative study for power consumption, noise cancellation, and real time high speed applicationsdspsfpgas能耗比较研究,降噪,实时高速应用.pdfVIP

J. Software Engineering Applications, 2010, 3: 391-403 391 doi:10.4236/jsea.2010.34044 Published Online April 2010 (http://www.SciRP.org/journal/jsea) DSPs/FPGAs Comparative Study for Power Consumption, Noise Cancellation, and Real Time High Speed Applications Alon Hayim, Michael Knieser, Maher Rizkalla Department of Electrical and Computer Engineering, Indiana University Purdue University Indianapolis, Indianapolis, USA. Email: mrizkall@, mrizkall@ Received December 24th, 2009; revised January 6th, 2010; accepted February 3rd, 2010. ABSTRACT Adaptive noise data filtering in real-time requires dedicated hardware to meet demanding time requirements. Both DSP processors and FPGAs were studied with respect to their pe rformance in power consumption, hardware architecture, and speed for real time applications. For testing purposes, real time adaptive noise filters have been implemented and simulated on two different platforms, Motorola DSP56303 EVM and Xilinx Spartan III boards. This study has shown that in high speed applications, FPGAs are advantageous over DSPs with respect of their speed and noise reduction because of their parallel architecture. FPGAs can handle more processes at the same time when compared to DSPs, while the later can only handle a limited number of parallel instructions at a time. The speed in both processors impacts the noise reduction in real time. As the DSP core gets slower, the noise removal in real time gets harder to achieve. With respect to power, DSPs are advantageous over FPGAs. FPGAs have reconfigurable gate structure which con- sumes more power. In case of DSPs, the hardware has been already configured, which requires less power consump- tion? FPGAs are built for general purposes, and their silicon area in the core is bigger than that of DSPs. This is an- other factor that affects power consumption. As a result, in high frequency appl