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Enabling 3D NAND Devices of the Future (使未来的3 d NAND闪存设备)
Enabling 3D NAND Devices of the Future
The Necessity for a Memory Modem™ in 3D Memories
Hanan Weingarten
DensBits Technologies
Flash Memory Summit 2014
Santa Clara, CA 1
Outline
2D Vs 3D NAND
3D NAND – How Does It Work
• p-BiCS example
3D NAND (unique) Considerations
• Inter-Cell / Block Interference
• TLC on 3D NAND
• Scaling
Summary
Flash Memory Summit 2014
Santa Clara, CA 2
2D Vs 3D NAND (1)
2D NAND limitations below 1xnm:
• Lithographic limitations:
- Additional scaling requires quad-patterning, Ultra-violet
• Reliability limitations (retention, read and program disturbs):
- Channel isolation deterioration
- Stored charge with small number of electrons (a few dozens)
- Increased cell to cell interference
• Performance
- Longer programming times
- Longer read times
Flash Memory Summit 2014
Santa Clara, CA 3
2D Vs 3D NAND (2)
3D NAND:
- Solves many of the issues of 2D NAND
- Instead of scaling x-y dimensions, scale-up
- Scale back lithography:
– Feature size 3Xnm
– No double / quad patterning
– Improved reliability
- Higher performance (Samsung)
- Scaling:
– Through additional number of layers
Flash Memory Summit 2014
Santa Clara, CA 4
3D NAND – How
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