OpenSparc乘法器代码.docVIP

3个不同的模块：mul 和swrvr_clib以及swrvr_dlib // ========== Copyright Header Begin ========================================== // // OpenSPARC T1 Processor File: mul64.v // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. // // The above named program is free software; you can redistribute it and/or // modify it under the terms of the GNU General Public // License version 2 as published by the Free Software Foundation. // // The above named program is distributed in the hope that it will be // useful, but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU // General Public License for more details. // // You should have received a copy of the GNU General Public // License along with this work; if not, write to the Free Software // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. // // ========== Copyright Header End ============================================ /*////////////////////////////////////////////////////////////////////// // // Module Name: mul64 // Description: *This block implements the multiplier used in the modular multiplier // unit (MUL) and be shared by sparc EXU and the streaming unit (SPU). // It is also used as the 54x54 multiplier in the FPU. // *It takes two 64-bit unsign data and accumulated operand and do the // 64x64 MAC operation at two cycle thruput and 5 cycle latency. // *The mul_valid signal indicate the beginning of a new operation. // It MUST be dis-asserted at the next cycle to have the proper 2-cycle // latency operation in the csa array. If there are two back-to-back // cycle operation, the first operation result will be incorrect. // *Results are avaliable on the 5th cycle o