[信息与通信]NT-8-Single Carrier PHY.pptVIP

Modulation: pi/2-BPSK (2) p/2 rotation continues throughout the entire SC frame (including payload), regardless of payload constellation. Option 2: Equivalent Precoded (G)MSK Realization BPSK Mapper p/2 Chip Rotator LPF Quadrature Modulator + D (G)MSK Modulator Option 1: p/2-BPSK Realization Bits in Bits in May 2010 Slide * Murat Mese, Broadcom, et. al. SC MCS Symbol Block Format Two 672-bit LDPC codewords fit exactly into 3 blocks of data for p/2-BPSK. Shortening performed only at end of frame Simplifies receiver GI is a fixed L=64 Golay sequence. Not a cyclic prefix, though blocks still have a cyclic property if the GI of the next symbol is included. Useful for parameter updates and enables either time- or frequency-domain equalization Control MCS does not use symbol blocking with GI. 448 symbols 448 symbols 448 symbols 64 64 64 GI DATA GI DATA GI DATA 64 GI Trailing GI to maintain cyclic property for last symbol block. May 2010 Slide * Murat Mese, Broadcom, et. al. SC MCS Payload Encoding Payload bits are broken into blocks of LCWD = 336, 420, 504, or 545 data bits and encoded by the LDPC codeword encoder to produce blocks of 672 bits. Data pad (0) is added to ensure that full codewords are transmitted. The zero bits are scrambled with the continuation of the scrambler sequence. Block pad (0) is added to ensure that full SC blocks are transmitted. The zero bits are scrambled with the continuation of the scrambler sequence. An inner repetition code (with scrambler to reduce spectral lines in the output) is applied for MCS1. Up to 168 bits are encoded per codeword (with 336 parity bits). May 2010 Slide * Murat Mese, Broadcom, et. al. Common LDPC Code Set Code rates: R1=1/2, R2=5/8, R3=3/4 and R4=13/16, all 672 bits Each of the parity-check matrices H is partitioned into square sub-matrices of size Z x Z. The sub-matrices are either cyclic-permutations of the identity matrix, or null sub-matrices with all zero entries. In the following sl