基于OpenRISC开源CPU核SOC搭建.docxVIP

本科生学位论文基于Open Cores平台的SOPC设计开发院 系：信息科学与工程学院专 业：微电子学姓 名：指间沙指 导 教 师：********完 成 日 期：2011年6月6日摘要随着集成电路工业和电子技术的不断发展，人们越来越希望在一块芯片上完成更多的功能，并缩短其设计周期，使其拥有更灵活的可编程环境。为了满足上述要求，SOPC（System on a programmable chip）应运而生。SOPC概念是有Altera公司于2000年首先提出的，它是灵活的、高效SoC解决方案。SoC中包含了微处理器/微控制器、存储器以及其他专用功能逻辑，SoC应由可设计重用的IP核组成。利用IP核的重复使用可以缩短新产品的开发周期，降低开发成本及难度。本项目作为VIP实验室的一个准备性的平台搭设项目，将基于Open Cores的开源CPU核OpenRisc1200，搭建一个SOC系统。这个系统主要由OpenRisc 1200处理器、Wishbone总线互联模块、存储器控制器、URAT和一些片外设备构成。项目选择OR1200这个CPU核是因为其开源与免费。系统需要的一些其他IP核也可以在Open Cores的主页上找到相应的资源，开源的IP核为实验室以后的工作提供了便利，但同时由于其免费性，相应的技术支持就并不很好，所以需要设计者自己解决很多问题。该SOPC的硬件环境是Altera DE2-35平台，当系统相对成熟之后，最终需要在Altera的Stratix IV开发板上进行开发。关键词：SoC，SOPC，OpenRisc1200，开源，Wishbone总线AbstractAs the development of IC industry and electronic technology, people increasingly hope to integrated more function in a single chip, which has a short design cycle and flexible programming environment. To meet these requirements, SOPC (System on a programmable chip) came into being. The concept of SOPC is first proposed by Altera in 2000, SOPC is flexible, efficient SoC solutions. SoC contains a microprocessor/microcontroller, memory and other special function logic, SoC design should be composed of reusable IP cores. Using IP cores can shorten the development cycle of new products, reduce development costs and difficulty. The project will be a preparatory project for the VIP Laboratory, and it will be based on the open source CPU core OpenRisc1200 which is designed by Open Cores. The system in the project will be made up of a OpenRisc 1200 processor, Wishbone bus interconnect module, URAT, and some off-chip equipment such as DM9000A Ethernet controller and so on. We choose the OR1200 CPU core because of its open source and free. And the other IP cores the system needed can also find in the Open Cores home page. Open source IP core facilitate the next work for the Lab, but the technical support not very good. So there are more work for designer.The hardware environment of the SOPC is