基于程序段可重构cache与处理器低能耗算法.docVIP

基于程序段可重构cache与处理器低能耗算法 　　摘 要：运用可重构cache和动态电压缩放技术，为处理器及其cache提出了一种基于程序段的自适应低能耗算法PBLEA（phase??based low energy algorithm）。该算法使用建立在指令工作集签名基础上的程序段监测状态机来判断程序段是否发生变化，并作出cache容量及CPU电压和频率的调整决定。在程序段内，使用容量调整状态机和通过计算频率缩放因子??β??来先后对cache容量及CPU电压和频率进行调整。在Sim??panalyzer模拟器上完成了该算法的实现。通过对MiBench测试程序集的测试表明：与传统的cache和CPU相比较，该算法使系统能耗平均节省了49.1%，而平均性能损失为8.7%。?? 　　关键词：可重构高速缓冲存储器；动态电压缩放；自适应算法；运行程序段；低能耗?? 　　中图分类号：TP303 文献标志码：A 　　 文章编号：1001-3695(2008)09-2692-05 　　??Phase??based low??energy algorithm for reconfigurable cache and processor 　　??PENG Man??man,LI Ren??fa,PENG Fang,WANG Yu??ming 　　??(School of Computer Communication, Hunan University, Changsha 410082, China) 　　??Abstract:Utilizing the technology of reconfigurable cache and dynamic voltage scaling (DVS), this paper proposed a phase??based low??energy algorithm (PBLEA) for cache and processor. The algorithm used a state machine based on instruction working set signature for identifying the change in program and making a decision to adjust cache’s size and processor’s supply voltage and clock frequency. In every running??program phase, the algorithm used a state machine for governing cache and determining cache’s size, and setting processor’s voltage and clock frequency by calculating the ratio of the total off??chip access time to the total on??chip computation time (β). The algorithm has been realized in the Sim??panalyzer. By simulating numerous MiBench benchmarks, the results show that the algorithm saves on average 49.1% of total system energy compared with a conventional cache and CPU, then the average performance loss is close to 8.7%.?? 　　Key words:reconfigurable cache; dynamic voltage scaling(DVS); self??tuning algorithm; running??program phase; low energy?お? 　　 　　在系统结构设计中，能耗是与性能同等重要的首要设计约束。处理器及其cache（高速缓冲存储器）是计算机系统能耗的主要来源，降低两者的能耗是低能耗系统设计关注的焦点。动态电压缩放（DVS）技术，允许CPU在工作时动态地改变其时钟频率和供电电压，能有效地减少处理器的能耗。可重构cache[1]具有可变的配置参数集，可以在自适应算法的指导下根据运行程序的需求，通过关闭cache闲置未用的部分来调整容量，较大地提高能量效率。既然可重构cache与DVS都能分别有效地降低cache和处理器的能耗，那么，能否结