基于JTAG的片上调试器与调试系统的设计实现-计算机工程与应用.PDF

78 2012 ，48 （30） Computer Engineering and Applications 计算机工程与应用 基于JTAG 的片上调试器与调试系统的设计实现 常志恒，肖铁军，史顺波 CHANG Zhiheng, XIAO Tiejun, SHI Shunbo 江苏大学 计算机科学与通信工程学院，江苏 镇江 212013 School of Computer Science and Telecommunications Engineering, Jiangsu University, Zhenjiang, Jiangsu 212013, China CHANG Zhiheng, XIAO Tiejun, SHI Shunbo. Design of on-chip-debugger and debug system based on JTAG. Computer Engineering and Applications, 2012, 48 （30 ）：78-82. Abstract ：A design scheme of debug system for embedded CISC processor based on JTAG protocol is put forward. A OCD （On-Chip-Debugger ）is designed for JU-C2 processor which is a self-development processor used on teach- ing. USB-JTAG protocol convertor, control console on PC and self-build data scan chaining in CPU are also de- signed, which finally composes a complete debug system. The debug system can implement microinstruction and machine instruction step debug, breakpoint debug, processor internal registers examine and PC write, moreover, pro- cessor run/stop and reset commonly used debug function. It respectively introduces the system components and their principles, then tests the system to verify the correctness of the system work.The debug system is less invasive for the CPU internal data path, and has a certain degree of practicality in teaching. Key words ：On-Chip-Debugger （OCD ）; on chip debug system; Complex Instruction Set Computer（CISC ）proces- sor; Joint Test Action Group（JTAG ）; boundary scan 摘 要：提出了一种基于JTAG 协议的嵌入式CISC 处理器的调试系统的设计方案。针对自主研发的教学用 JU-C2 型处理器设计了片上调试器和CPU 内部寄存器扫描链，为构成一个完整的调试系统，还设计了USB-JTAG 协议转换器和PC 机控制软件。调试系统可以实现微指令级和机器指令级的单步、断点以及CPU 内部寄存器 值的查看和PC （程序计数器）写入，还有CPU 的运行停止和复位这些常用的调试功能。分别介绍了系统的各 个组成部分以及它们的原理，进行了系统测试，验证系统工作的正确性。调试系统对CPU 内部数据通路侵入 性较小，在教学中也有一定的实用性。 关键词：片上调试器；片上调试系统；复杂指令集计算机（CISC ）处理器；联合测试行动组（JTAG ）；边界扫描 文章编号：1002-8331（2012 ）30-0078-05 文献标识码：A 中图分类号：TP39 随着嵌入式系统的不断发展和应用越来越广 定位等要求，所以微处理器硬件上支持片上测试和