基于SPARC架构的ASIP设计与实现-电路与系统专业论文.docxVIP

摘要 在航天嵌入式处理机应用中，采用通用处理器或专用集成电路（ASIC）的实 现方式均不能同时兼顾性能和灵活性的要求。专用指令集处理器（ASIP）平衡了 专用集成电路的高性能和通用处理器的可编程特性，是针对某一特定应用或某一 领域应用而专门设计的微处理器。本文围绕航天嵌入式应用专用指令集处理器的 设计与实现做了以下三个方面的研究： 首先，选定 SPARC 架构作为专用指令集处理器实现的基础，并根据专用指 令集处理器的设计方法以及 FPGA 硬件资源的特性对 SPARC 架构的系统结构和 指令集结构做出了一定的精简与优化，进而提取出了一套专用的指令集。 其次，为了提高专用指令集处理器的性能，根据 FPGA 的资源特点，专用指 令集处理器采用了五级流水线的实现结构，并通过数据定向的技术和分支未执行 的策略来分别解决流水线中的数据冒险和控制冒险。 最后，以 Xilinx 公司的 FPGA Vertex-6 XC6VLX240T 为载体，对整个 ASIP 进行了系统仿真和综合验证，同时在该专用指令集处理器上实现了冒泡排序算法 和 FIR 数字滤波器这两个应用。由仿真与验证结果可知，本文所设计的专用指令 集处理器能够达到预期功能和时序要求，并且由于电路结构紧凑，在单片 FPGA 内能够集成多个专用指令集处理器核实现并行处理。 关键词：专用指令集处理器 SPARC 架构 五级流水线 FPGA Abstract In the application of embedded processors of aerospace, neither general-purpose processor nor application specific integrated circuit (ASIC) can meet the requirements of performance and flexibility simultaneously. Application Specific Instruction Set Processors (ASIPs) are a balance between high performance of ASICs and programmable of general purpose processors. ASIP is a microprocessor designed for a particular application or for a set of specific applications. This paper contains the following three parts of work which focused on the design and implementation of ASIP in embedded processors of aerospace field. First, SPARC architecture is selected as implementation base of ASIP, and according to the design methodology of ASIP and the in-chip resources feature of FPGA, the SPARC architecture is optimized on the system architecture and instruction set architecture. And finally an application specific instruction set is extracted. Second, in order to improve performance of ASIP and take full advantage of resources feature of FPGA, the five-stage pipeline is proposed, and the techniques of data forward and untaken branch are used to solve data hazard and control hazard respectively. Finally, the whole ASIP was simulated and verified on Xilinx Vertex-6 XC6VLX240T FPGA. The bubble sort algorithm and FIR digital filter are tested on the ASIP. According to the results of si