基于fpga的pci接口研究与实现-通信与信息系统专业论文.docxVIP

II II Abstract With high-speed real-time data capturing system increasingly high demands, how to improve the performance of data transmission interfaces, which is a key part of data capturing system, become an urgent task. The rapid development of computer technology to the development of these high-performance requirements of the data capturing system is possible. The traditional computer bus bandwidth constraints becomes a bottleneck in the high-speed data capturing system development. However, PCI bus has changed this situation, the high PCI bus transfer rate makes the development of high-speed data capturing system possibly. PCI Local Bus is intended for use as an interconnect mechanism between highly integrated peripheral controller components, peripheral add-in boards, and processor or memory systems. Because of higher speed, better reliability, lower cost and more excellent compatibility, PCI local bus has taken up the leading position at various PCI bus protocols. It is the first choice to adopt PCI local bus in the development of relative projects. This paper has a deep research on the PCI bus interface, which is a key part of gigabit packet filtering and capturing card, and compares three different implementions at home and abroad, and in-depth understands and analyzes PCI bus agreement. It simplifies the interface logic fuctions accroding to the system demand, and puts forward a new PCI interface design, adopts the retry mechanism and access memory to improve the interface logic performance as well. It also details the systems architecture,and the designs and implementions of every sub-modules, it gives the result of the verification in modules level and systems level, and analyzes the result. Bases on Xilinxs Spartan 3 series of FPGA chips for the hardware carrier, this paper adopts Verilog HDL language to describe RTL-level functions, achieve a filtering and capturing the packets functions of the system, the system is able to real-time deal with 4 Gbps