媒体数字信号处理器ip核关键技术研究-信息与通信工程专业论文.docxVIP

优秀毕业论文 精品参考文献资料 浙江大学硕士学位论文Abstract 浙江大学硕士学位论文 Abstract Rapid improvement of the deep-submicron technology and chip design techniques make system integration chip possible，and drive the embedded system design into multiprocessor systems-on-chips(MPSoCs)era．Multimedia processing is also driving force for the development of SoC．DSP with hiigh flexibility and good cost·performance ratio is especially suitable for multimedia processing fields．Media enhanced DSP design based IP speeds up the development of embedded systems．As hotspot,multi-core DSP is becoming effective solution for multimedia application． The author participates in the project of the MediaDSP64，which is developed by the SoC RD Group of Zhejiang University．The research work introduced in this thesis mainly the design of MediaDSP64 IP core，including DSP micro-architecture，data transporting mechanism and precise exceptions supporting RTOS(real time operation system)and debugger． By analyzing the pipeline control and data hazards，a general bypassing model which is abstracted from the behavior of pipeline operation WaS established．In order to analyze the data bypaSsing strategy in the processor,a method of design complexity estimation WaS suggested． With the help of bypaSsing model，some ideaS like simplified partial bypaSsing,auxiliary register file，and hazards detection according to need wel-e implemented in MD64’S bypaSsing optimization design to reduce hardware resources and improve pipeline performances efficiency． Meanwhile decoupling method WaS used to reduce the delay latency of critical path．The suggested general bypassing model also be used in design bypassing network in superscalar and VLIW processors． From parallelism between multi data transfer task and computing,this paper discusses the importance of using DMA technique to CalTy out data transmission for DSP．Multimode DMA engine is designed in MD64，which has advantage of low overhead，high data transfer efficiency and flexibility in programming．