第三章数字逻辑.ppt

Review of Chapter 3 (第三章内容回顾) Three kinds of Description Method (三种描述方法)： Truth Table (真值表) Logic Expression (逻辑表达式) Logic Circuit (逻辑符号) NAND and NOR (与非和或非) Review of Chapter 3 (第三章内容回顾) Logic Families: TTL Family and CMOS Family (逻辑系列：TTL系列 和 CMOS系列) CMOS Logic Level (CMOS逻辑电平) Review of Chapter 3 Review of Chapter 3 Review of Chapter 3 Review of Chapter 3 Review of Chapter 3 The Additive “on” Resistance of series transistors limits the Fan – In of CMOS gates. (导通电阻的可加性限制了CMOS门的扇入数) 3.4 Electronic Behavior of CMOS Circuits (CMOS电路的电气特性) 3.4 Electronic Behavior of CMOS Circuits (CMOS电路的电气特性) Speed, Power Consumption (速度、功耗) Noise, Electrostatic Discharge (噪声、静电放电) Open-Drain Outputs, Three State Outputs (漏极开路输出、三态输出) 3.5 CMOS Steady-State Electrical Behavior (CMOS稳态电气特性) Logic Levels and Noise Margins ( 逻辑电平和噪声容限) 3.5 CMOS Steady-State Electrical Behavior (CMOS稳态电气特性) Logic Levels Specifications (逻辑电平规格) 3.5 CMOS Steady-State Electrical Behavior (CMOS稳态电气特性) 3.5.2 Circuit Behavior with Resistive Loads (带电阻性负载的电路特性) 3.5.2 Circuit Behavior with Resistive Loads (带电阻性负载的电路特性) 3.5.2 Circuit Behavior with Resistive Loads (带电阻性负载的电路特性) 3.5.2 Circuit Behavior with Resistive Loads (带电阻性负载的电路特性) 3.5.2 Circuit Behavior with Resistive Loads (带电阻性负载的电路特性) 3.5.3 Circuit Behavior with Non-ideal Inputs (非理想输入时的电路特性) 3.5.4 Fan-out（扇出） The Number of Inputs that the Gate can drive without exceeding its worst-case loading specifications. (在不超出其最坏情况负载规格的条件下， 一个逻辑门能驱动的输入端个数。) Fan-out must be examined for both possible output states, HIGN and LOW (扇出需考虑输出高电平和低电平两种状态) Overall Fan-out = Min (HIGH-state and LOW-state [ 总扇出＝min（高态扇出，低态扇出）] DC Fan-out and AC Fan-out (直流扇出 和 交流扇出) 3.5.5 Effects of Loading (负载效应) Loading an Output Beyond its rated Fan-out [ 当输出负载大于它的扇出能力时] Output Voltage become Worse [ 输出电压变差（不符合逻辑电平的规格）] Propagation Delay, Rise and Fall time may Increase ( 传输延迟和转换时间变长 ) Temperature of the device ma