分片式处理器上指令调度器的设计与优化计算机系统结构专业论文.docxVIP

AbstractABST Abstract ABST RACT As the development ofthe semiconductor technology and computer architecture technobgy，Tiled Processor Architecture(TPA)becomes direction of multi-core processors．Tiled processor effectively solves the wire dehy,power consumption, scalability,and many other problems that modern processors face．Tiled processor architecture implements a gbbal control flow and Jocal data flow combined computing model，which divides the program into many hyperblocks．A hyperbbck is a program structure having a single entry and several exits．There are control dependences among hyperblocks．To expbsive the instruction level parallelism,we take over control dependences with data dependence inside the hyperbbck．As an important component of compiler system,instruction scheduler is the key of improving procedure performance．This dissertation focuses on designing and implementing an instruction scheduler for a tiled processor TPA—PI，including how to map instructions onto the chip，how to use soRware abilities to manage the computation and storage reSOUrces on the chip． The major contr而utions ofthis work are as follows：(1)Design and implement all instruction scheduler for a tiled processor TPA-PI．TPA-PI instruction scheduler takes hyperbbck as unit and maps the bbck onto the TPA-PI processor execution army．It takes TPA-C as input,output assembly language TPA-S．(2)Analysis several factors with quantitative approach．These factors affect the performance o f the procedtues．We can improve the heuristics functions of instruction scheduler with the results．We take critical path,load balance，data localitM register instructions，anchor point instructions，weighted path,average path and on-chip network aS analyzed factors．(3)Propose an instruction scheduling algorithm based on heuristics functions， raise two heuristics functions：AVBLON and ARBLON，we take anchor point instructions(A)，average path(V)，bad bahnce03)，data locality(L)，register instructions(O)，on—chip network(N)as param