基于FPGA的数字系统设计实验3控制液晶显示屏显示字符OK.docxVIP

Jian程序 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD LOGIC UNSIGNED.ALL; ——Uncomment the following library declaration if instantiating ——any Xilinx primitives in this code. -library UNISIM; -use UNISIM.VComponents.all; entity led is port( elk, reset: in bit; SF_D : out bit_vector(3 downto 0); LCD_E, LCD_RS, LCD_RW, SF_CEO : out bit; LED : out bit_vector(7 downto 0)); end led; architecture behavior of led is type tx_sequence is (high_setup, high_hold, oneus, low_setup, low_hold, fortyus, done); signal tx_state : tx_sequence := done; signal tx_byte : bit