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宝典fpga为系统操纵核心设计的vga显示的数字示波器.doc

宝典fpga为系统操纵核心设计的vga显示的数字示波器.doc

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【摘 要】本系统是以EXCD-1可编程片上系统开发板为基础,采用FPGA为系统控制核心设计的VGA显示的数字示波器。利用VHDL语言编程,辅以边缘触发电路和A/D转换电路,实现了任意波形的单次触发、连续触发和存储回放功能,并按要求进行了垂直灵敏度和扫描速度的档位设置。采集外部输入信号时,信号经A/D转换后的数字信息送入FPGA内部的SRAM进行高速缓存,并将结果送给VGA示波器进行显示,完成了对中、低频信号的实时采样和数据存储回放。经测试,系统整体指标良好,垂直灵敏度和扫描速度等各项指标均达到设计要求。 【关键字】 FPGA ADS931E 触发电路 VGA显示 Abstract: The sysytem which adopts the VGA display, takes the EXCD-1 programmable piece on the system development board as the base and uses FPGA as the control system nucleus is a digital oscillograph adopting the VGA display. Use the VHDL language programming, auxiliarying by edge trigger circuit and A/D Converting circuit, to realize single triggering of random profile, continuous triggering and the memory playbacking function. In addition to, it has carried on position establishment of the vertical sensitivity and the scanning velocity according to the request. When gathering the external signal, it carries on the high speed buffer through transforming after A/D sending in FPGA the external input signal the interior pair of mouth RAM, and gives the result through the VHDL programming to the VGA oscilloscope to carry on the demonstration.Therefore, it has completed to the middle and low-frequency signal real-time sampling and data storage playbacking. After the test, the overall target of the system is good. Each target, such as the vertical sensitivity and the scanning velocity, achieves the design requirements. Key words: FPGA A/D conversion Trigger circuit VGA display 目录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc272782504 1. 方案论证与比较 PAGEREF _Toc272782504 \h 4 HYPERLINK \l _Toc272782505 1. 1 控制器部分 PAGEREF _Toc272782505 \h 4 HYPERLINK \l _Toc272782506 1. 2 A/D模数转换模块 PAGEREF _Toc272782506 \h 4 HYPERLINK \l _Toc272782507 1. 3 VGA显示器 PAGEREF _Toc272782507 \h 5 HYPERLINK \l _Toc272782508 2. 理论分析与计算 PAGEREF _Toc272782508 \h 5 HYPERLINK \l _Toc272782509 2. 1 采样方式 PAGEREF _Toc272782509 \h 5 HYPERLINK \l _Toc272782510 2. 2 垂直灵敏度分析 PAGEREF _Toc272782510 \h 5 HYPERLINK \l

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