第8章-数字时钟设计.pptVIP

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY LED7 IS PORT( DIN:IN STD_LOGIC_VECTOR(3 DOWNTO 0); DOUT:OUT STD_LOGIC_VECTOR(6 DOWNTO 0)); END LED7; ARCHITECTURE ONE OF LED7 IS BEGIN PROCESS(DIN) BEGIN CASE DIN IS WHEN0000=DOUT=1111110; WHEN0001=DOUT=0110000; WHEN0010=DOUT=1101101; WHEN0011=DOUT=1111001; WHEN0100=DOUT=0110011; WHEN0101=DOUT=1011011; WHEN0110=DOUT=1011111; WHEN0111=DOUT=1110000; WHEN1000=DOUT=1111111; WHEN1001=DOUT=1111011; WHEN OTHERS=DOUT=0000000; END CASE; END PROCESS; END ONE; 7.顶层文件 LIBRARY I